Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2011-08-30
2011-08-30
Baderman, Scott T (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
08010867
ABSTRACT:
An error correction code decoding device comprises a first memory having a memory space like a matrix, a first decoding unit writing a first information into the first memory along a first direction, a second decoding unit reading the first information from the first memory along a second direction and a plurality of turbo decoders included in the second decoding unit, and differentiating access timing to a same row or same column with each other.
REFERENCES:
patent: 6678843 (2004-01-01), Giulietti et al.
patent: 7127656 (2006-10-01), Van Stralen et al.
patent: 7590929 (2009-09-01), Morita et al.
patent: 7743287 (2010-06-01), Dimou
patent: 2004/0025103 (2004-02-01), Obuchii et al.
patent: 2004-15285 (2004-01-01), None
patent: 2006-217072 (2006-08-01), None
patent: 2006/082923 (2006-08-01), None
Japanese Official Action— 2007-262001—May 24, 2011.
Ahmed Enam
Baderman Scott T
Renesas Electronics Corporation
Young & Thompson
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