Error correction circuit

Details Error correction circuit Error correction circuit

2007-11-20

2007-11-20

Chase, Shelly (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

11057150

ABSTRACT:
An error correction circuit includes a selected-bit reverse circuit, an ECC circuit, a checkbit generation circuit, an ECC data register, a bit-comparing circuit, and an address memory unit. The selected-bit reverse circuit includes memory data and check data from the memory unit. The ECC circuit corrects a one-bit error. The checkbit generation circuit generates checkbits. The ECC data register stores the corrected data and the checkdata. The bit-comparing circuit compares each bit between the output data A from the selected-bit reverse circuit and the output data A′ from the ECC data register. The address memory unit stores an address corresponding to the memory data when the bit-comparing circuit detects a discrepancy among the data A and the data A′. The error data memory unit writes the discrepancy information at the bit-location. The data OR circuit generates the first signal.

REFERENCES:
patent: 4794597 (1988-12-01), Ooba et al.
patent: 5341379 (1994-08-01), Crisp
patent: 5978953 (1999-11-01), Olarig
patent: 7069482 (2006-06-01), Callahan
patent: 2000-020409 (2000-01-01), None

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