Error correction and detection system for mass storage controlle

Details Error correction and detection system for mass storage controlle Error correction and detection system for mass storage controlle

1997-03-24

1999-12-14

Grant, William

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

714746, 714748, 714781, 714785, 714 48, 714 49, 714 54, G06F 1108, G06F 1110, G06F 1100, G08C 2502

Patent

active

060031514

ABSTRACT:
Data read out from a mass storage unit are provided as a serial data stream in parallel to both a buffer memory and an error detection circuit. The read out data are stored within the buffer memory. At the same time, the error detection circuit performs an error detection operation on the serial data stream read out from the mass storage unit. The error detection operation consists of dividing a segment of the serial data stream corresponding to a data block by the error check polynomial and determining the remainder of the division operation. The remainder from this initial error division operation is stored. Error correction is then performed on the data stored in the buffer memory, for example using a Reed-Solomon code. When erroneous bytes are identified by the error correction circuitry, the error equations are solved to determine the error pattern and then the erroneous byte is overwritten in the buffer memory. The location of the erroneous byte within the serial data stream, along with the error pattern of the byte, are then used to calculate a correction to the remainder from the initial error division by the error check polynomial on the read in data stream. Error correction continues until the remainder is reduced to a zero value. At this point, it is assumed that all of the errors have been corrected and the data stored in the buffer memory is provided to the data bus of the host computer.

REFERENCES:
patent: 4413340 (1983-11-01), Odaka et al.
patent: 4646303 (1987-02-01), Narusawa et al.
patent: 4680764 (1987-07-01), Suzuki et al.
patent: 4730321 (1988-03-01), Machado
patent: 4802152 (1989-01-01), Markvoort et al.
patent: 5241546 (1993-08-01), Peterson et al.
patent: 5379305 (1995-01-01), Weng
patent: 5563896 (1996-10-01), Nakaguchi
patent: 5581715 (1996-12-01), Verinsky et al.
patent: 5604753 (1997-02-01), Bauer et al.
patent: 5617384 (1997-04-01), Yonemitsu et al.
Microsoft Press, Computer Dictionary, 3rd Edition, 1997, p. 104.

Affiliated with

Also associated with

Rating

Error correction and detection system for mass storage controlle does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Error correction and detection system for mass storage controlle, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Error correction and detection system for mass storage controlle will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-874530