Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
2007-10-29
2008-12-30
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S112000
Reexamination Certificate
active
07471115
ABSTRACT:
The invention includes an error correcting logic system that allows critical circuits to be hardened with only one redundant unit and without loss of circuit performance. The system provides an interconnecting gate that suppresses a fault in one of at least two redundant dynamic logic gates that feed to the interconnecting gate. The system is applicable to dynamic or static logic systems. The system prevents propagation of a fault, and addresses not only soft errors, but noise-induced errors.
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Bernstein Kerry
Emma Philip G.
Fifield John A.
Kartschoke Paul D.
Klaasen William A.
Barnie Rexford
Harding W. Riyon
Hoffman Warnick LLC
International Business Machines - Corporation
White Dylan
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