Error-correcting code interleaver

Details Error-correcting code interleaver Error-correcting code interleaver

2005-01-04

2005-01-04

Chase, Shelly A (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Data formatting to improve error detection correction...

C714S788000

Reexamination Certificate

active

06839870

ABSTRACT:
Memory may be partitioned into ever-sliding FIFOs. Each of the FIFOs may be stacked end-to-end in memory with the oldest data at the base offset and the newest at the end (or vice-virsa). Each symbol, the pointer may be incremented (modulo the set size) by an appropriate amount (typically J more than for the previous symbol). After each set, the pointers may be incremented by J more than the previous increment and the process starts over, wrapping around the memory if the end of the memory is reached. After a preset number of symbols, the process may restart from an increment of J. Alternatively, the pointers may be decremented rather than incremented. Thus, the newest symbol cannibalizes the memory position vacated by the oldest symbol in the current FIFO, causing the FIFOs to “slide”, providing for a very efficient and reliable use of memory for error-correcting code interleaving.

REFERENCES:
patent: 5764649 (1998-06-01), Tong
patent: 6536001 (2003-03-01), Cai et al.
patent: 20030023909 (2003-01-01), Ikeda et al.

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