Error correcting and controlling system

Details Error correcting and controlling system Error correcting and controlling system

1984-05-14

1986-08-05

Atkinson, Charles E.

Excavating

371 38, G06F 1110

Patent

active

046047476

ABSTRACT:
An error correcting and controlling system forms syndromes S.sub.1 and S.sub.2 for each of a set of reproduced, sampled signal words and error correcting words P or Q and also forms a syndrome S.sub.i =S.sub.1 .sym.T.sup.i-7 S.sub.2 by using the result of a CRC check of the set of sampled signal words. An error position i is determined by three zero counters which respectively indicate S.sub.1 .noteq.0, S.sub.2 .noteq.0 and S.sub.i .noteq.0. Alternatively, the system may further include three counters for respectively counting errors developed in the set of sampled signal words, and the error correcting words P and Q, the errors being detected by a CRC check circuit. When any one of the counters counts an error and the remaining counters count no error with S.sub.1 .noteq.0, S.sub.2 .noteq.0 and S.sub.i .noteq.0, a control signal is generated to perform a concealing operation, such as a means value interpolation, etc.

REFERENCES:
patent: 4320510 (1982-03-01), Kojima
patent: 4368533 (1983-01-01), Kojima
Patel et al., Optimal Rectangular Code for High Density Magnetic Tapes, IBM Journal of Research Developments, Nov. 1974, pp. 579-588.
STC-007 Consumer Use PCM Encoder-Decoder, Electronic Industries Assoc. of Japan, Jun. 1979.

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