Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2000-07-28
2001-12-11
Tu, Christine T. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S712000
Reexamination Certificate
active
06330699
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to error compensating technology which compensates for bit errors occurring during transmission of transmission data, by retransmitting the transmission data. In particular, the present invention relates to error compensating technology for the case where high speed data transmission is carried out by making up frames of a predetermined period using a plurality of short data packets such as ATM cells.
2. Description of the Related Art
In wireless transmission, the occurrence of bit errors during transmission can not be avoided, and therefore various error compensating techniques have been investigated. For these error compensating techniques, the FEC (Forward Error Correction) method and the ARQ (Automatic Repeat Request) method are effective. Here with the FEC method, a redundant bit is appended to the transmission data, and bit error correction is carried out based on this redundant bit. On the other hand, with the ARQ method, when a bit error is detected, the transmission data is retransmitted.
Of these methods, the FEC method is aimed at improving BER (bit error ratio). Therefore when the FEC method is used, then with respect to bit errors occurring in bursts, there are many cases where such bit errors cannot be adequately corrected. Therefore to carry out accurate data transmission, the ARQ method must be used.
FIG. 10
is a explanatory diagram illustrating an example of conventional error compensating processing using the ARQ method. In
FIG. 10
, the horizontal thick lines represent time lines for respective transmission equipment and reception equipment. The vertical dotted lines indicate divisions between transmission frames and receiving frames. The rectangular boxes denoted by numerals
21
-
28
indicate data packets. The numerals inside the rectangular boxes denote sequence numbers which are appended to the data packets. The arrows extending from the transmission equipment to the reception equipment indicate the flow of data packets. The arrows extending from the reception equipment to the transmission equipment indicate the flow of control information. The places marked with an X where the arrows do not reach the mating equipment indicate the occurrence of a bit error at the time of transmission of a data packet or control information.
With the data packets
21
-
28
to be transmitted from the transmission equipment, a sequence number is appended to each data packet unit. The reception equipment checks the reception condition, and when reception is normal, an ACK (acknowledgment) serving as a normal reception notification, together with the sequence number of the received data packet is sent back as control information. On the other hand, in the case where the reception equipment fails in reception, then an NAK (Negative Acknowledgment) is sent back as the control information. In the case where an ACK and the sequence number cannot be identified amongst the control information that has been sent back (or in the case where an NAK is received), then the transmission equipment retransmits the data package, which is assumed to have failed in transmission. By means of the above processing, all of the information can be reliably delivered to the reception equipment.
FIG. 11
is a block diagram illustrating a configuration example of transmission equipment in a conventional error compensating apparatus. In FIG.
11
. numeral
10
denotes transmission equipment, numeral
100
denotes a sequence number appending circuit, numeral
101
denotes a data memory circuit, numeral
102
denotes a control information reception circuit, numeral
103
denotes a transmission control circuit, numeral
104
denotes a transmission circuit, and numeral
106
denotes a communication status management table.
In FIG.
11
. the sequence number appending circuit
100
appends a sequence number to each data packet, and the data packet is then sent to the data memory circuit
101
. The data memory circuit
101
temporarily stores the data packet. The control information reception circuit
102
receives control information (ACK and sequence number) from the reception equipment (refer to FIG.
12
), and sends this control information to the transmission control circuit
103
. A control section (not shown in the figure) of the communication status management table
106
then takes from the control information reception circuit
102
via the transmission control circuit
103
, the sequence number (for example the sequence number for which normal reception has been verified) from amongst the control information. The control section then compares this sequence number (for normal reception) with the sequence number for the already transmitted data packet, and based on the comparison result, manages the sequence number of any data packets assumed to have not been normally transmitted. The transmission control circuit
103
refers to the communication status management table
106
, to decide on the sequence number of the next data packet to be sent. Moreover, at a predetermined timing, the transmission control circuit
103
directs the transmission of the data packet corresponding to the sequence number to the data memory circuit
101
and the transmission circuit
104
.
FIG. 12
is a block diagram illustrating a configuration example of the reception equipment in a conventional error compensating apparatus. In
FIG. 12
, numeral
11
denotes the reception equipment, numeral
110
denotes a data reception circuit, numeral
111
denotes a bit error detection circuit, numeral
112
denotes a sequence number separation circuit, numeral
113
denotes a retransmission control circuit, and numeral
114
denotes a data packet buffer.
The data reception circuit
110
receives the data packet transmitted from the transmission equipment (refer to FIG.
11
). The bit error detection circuit
111
judges if a bit error has occurred in the received data packet. If a bit error is detected, the data packet is discarded. On the other hand, if a bit error is not detected, the bit error detection circuit
111
sends the data packet to the sequence number separation circuit
112
. The sequence number separation circuit
112
then separates the sequence number from the data packet, and sends the separated sequence number to the retransmission control circuit
113
. On the other hand, the data within the data packet is output via the data packet buffer
114
. The retransmission control circuit
113
sends back to the transmission equipment (refer to
FIG. 11
) as control information, the sequence number received from the sequence number separation circuit
112
, together with an ACK.
The above is an outline of a conventional error compensating apparatus which uses the ARQ method. Here the case has been described for where the sequence number of the normally received data packet is sent back together with an ACK. However. the case can also be considered where in a similar manner, the sequence number of the data packet which was not normally received is sent back together with an NAK. However with the abovementloned apparatus, in either case where the ACK or the NAK is sent back, the sending back of the ACK or the NAK is carried out for each receipt of one data packet.
With the above mentioned conventional apparatus, as representative examples of management methods for managing the sequence number of the data packet to be retransmitted, a GBN (Go Back N) method and an SR (Selective Repeat) method have been presented. With the GBN method, the data packet where the bit error is detected and all subsequent data packets are successively retransmitted. With the SR method, only the data packet in which the bit error has been detected is selectively retransmitted. As follows is a description of processing algorithms for the GBN method and the SR method used in the conventional apparatus.
FIG. 13
is a flow chart illustrating an operation example of transmission equipment which constitutes an error compensating apparatus in the conventional error com
Ohta Atsushi
Umehira Masahiro
Yoshioka Masafumi
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Nippon Telegraph & Telephone Corporation
Tu Christine T.
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