Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1998-06-17
2001-07-31
Chung, Phung M. (Department: 2784)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S758000, C714S799000, C714S807000
Reexamination Certificate
active
06269464
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to error detection and, more particularly, to error detection in a system where data is “packetized” and passes through several interfaces prior to storage on non-volatile media.
Cyclic Redundancy Checking (CRC) is a well-known error detection technique that calculates CRC byte(s) for data and appends the CRC bytes to the data to be propagated together as a CRC packet. A CRC checker then checks the CRC packet to determine whether the data has been corrupted during propagation.
Subsequently, the CRC packet itself is grouped with other CRC packets to form “super packets”. It is then necessary to generate CRC bytes for the super packet and append those bytes to the super packet to form a “super CRC packet”.
As the super CRC packet is passed through various interfaces, it should be checked to be sure that data is not corrupted.
Generating the CRC bytes necessary for error checking and checking the various packets and super packets is computation intensive and consumes valuable processing resources as well as introducing delays into the propagation of data.
Accordingly, efficient techniques to assure integrity of data stored on non-volatile media are needed in the industry.
SUMMARY OF THE INVENTION
According to an aspect of the present invention, error checking utilizing cyclic redundancy checking (CRC) techniques is utilized to check for errors as data passes across multiple interfaces.
According to another aspect of the invention, bang CRCs (!CRC) are predicted for cumulated data structures by utilizing the properties of appended bang CRCs using an equivalent structure of all “1”s. CRCs of cumulative CRC
C
structures are checked by comparing such predicted result and the result of explicit byte-by-byte calculation in the checker.
According to another aspect of the invention, the cumulative CRC
C
is calculated by the interface unit coupling a virtual drive emulation system to a disk storage unit.
Other features and advantages of the invention will be apparent in view of the following detailed description and appended drawings.
REFERENCES:
patent: 5638384 (1997-06-01), Hayashi et al.
patent: 5954835 (1999-09-01), Higginson et al.
patent: 6003151 (1999-12-01), Chuang
Boussina Touraj
Miller Jerry
Chung Phung M.
Sutmyn Storage Corporation
Townsend and Townsend / and Crew LLP
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