Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2008-01-22
2008-01-22
Lamarre, Guy J. (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S784000, C714S777000, C714S783000, C714S781000
Reexamination Certificate
active
07322002
ABSTRACT:
Improved memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory systems or devices in combination with a stored record of known flaws, errors, or questionable data bits of a read memory row or block to allow for more efficient processing and correction of these errors. An embodiment of the present invention utilizes an erasure pointer that can store the location of N bad or questionable bits in the memory segment that is currently being read, where for each bit stored by the erasure pointer the embodiment also contains 2NECC generators to allow the read data to be quickly checked with the know bad bits in each possible state. This allows the read data to then be easily corrected on the fly before it is transferred by selecting the bad bit state indicated by the ECC generator detecting an uncorrupted read.
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Keays Brady L.
Radke William H.
Swaminathan Shuba
Lamarre Guy J.
Leffert Jay & Polglaze P.A.
Micro)n Technology, Inc.
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