Erasure FEC decoder and method

Details Erasure FEC decoder and method Erasure FEC decoder and method

2008-03-18

2008-03-18

Chase, Shelly (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

11012302

ABSTRACT:
Disclosed is a method and erasure FEC decoder for correcting a pattern of errors by a two-dimensional decoding, the pattern of errors comprising at least two codewords in both a first and a second dimensions with a number of errors in common higher than the capacity of the code which is used for decoding. The method comprises the steps of: performing a full capacity decoding along the second dimension for removing possible false corrections introduced by a previous decoding performed along the first dimension; performing a reduced-capacity decoding along the first dimension, for identifying errored codewords along the first dimension; performing a full capacity decoding along the second dimension with disabled correction feature for identifying errored codewords along the second dimension; detecting the error coordinates from the information from steps b) and c); and correcting the detected pattern of errors.

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Yamane et al., Blt error rate analysis on iterative two-stage decoding of two dimensional codes by importance sampling, 2003, IEEE, p. 3140-3144.
Seung Ho Kim et al: “Decoding Strategies for Reed-Solomon Product Codes: Application to Digital Video Recording Systems,” IEEE Transactions on Consumer Electronics, IEEE Inc. New York, US, vol. 38, No. 3, Aug. 1, 1992, pp. 243-246, XP000311844.
Anonymous: “Decoding organisation for product codes” Research Disclosure, Kenneth Mason Publications, Hampshire, GB, vol. 342, No. 39, Oct. 1992, XP007118196.

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