Erase discharge method of memory device and discharge...

Details Erase discharge method of memory device and discharge... Erase discharge method of memory device and discharge...

2008-05-06

2008-05-06

Luu, Pho M. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185200, C365S203000

Reexamination Certificate

active

11303557

ABSTRACT:
A method for discharging an erase voltage of a semiconductor memory device and discharge circuit for performing the method, the method including performing a first discharge on a common source line (CSL) of the semiconductor memory device, comparing the detected CSL voltage with a predetermined reference voltage, and performing a second discharge on the CSL when the detected CSL voltage is lower than a predetermined reference voltage.

REFERENCES:
patent: 5822247 (1998-10-01), Tassan Caser et al.
patent: 6344992 (2002-02-01), Nakamura
patent: 6549465 (2003-04-01), Hirano et al.
patent: 2005/0286328 (2005-12-01), Kurosaki et al.
patent: 11-213684 (1999-08-01), None
patent: 2003-338186 (2003-11-01), None
patent: 2004-071067 (2004-03-01), None
English language abstract of Japanese Publication 11-213684.
English language abstract of Japanese Publication 2003-338186.
English language abstract of Japanese Publication 2004-071067.

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