Erasable programmable read only memory device

Details Erasable programmable read only memory device Erasable programmable read only memory device

1988-10-24

1989-11-14

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Simultaneous operations

36523003, 365200, 365210, 36518905, G11C 700, G11C 800, G11C 702

Patent

active

048812005

ABSTRACT:
There is disclosed an erasable programmable read only memory device shifted into one of a write-in mode of operation, a read-out mode of operation and a diagnostic mode of operation, the memory device comprises a plurality of input data distributing circuits each provided in association with each memory cell array and operative to simultaneously transfer a data bit to a first write-in circuit for the memory cell array and to a second write-in circuit for a redundant memory cell array in the diagnostic mode of operation, so that the data bit is simultaneously written into both of the memory cell and the redundant memory cell, thereby decreasing the time period consumed in the diagnostic mode of operation.

REFERENCES:
patent: 4656610 (1987-04-01), Yosahida et al.
patent: 4701887 (1987-10-01), Ogawa
patent: 4719602 (1988-01-01), Hag et al.
patent: 4757474 (1988-07-01), Fukushi et al.

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