Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
1999-09-10
2002-04-16
Chung, Phung M. (Department: 2784)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C714S819000
Reexamination Certificate
active
06374388
ABSTRACT:
BACKGROUND OF THE INVENTION
When monitoring data signals within a communication system, it is desirable to identify those bit patterns in the signals that cause errors or otherwise corrupt the performance of the communication system. Equivalent time sampling oscilloscopes enable data signals to be sampled and displayed when the data rates of signals are too high for real time sampling of the signals, but the resulting displayed signals include a series of disconnected dots, from which, it is difficult to identify a particular bit pattern. Particular bit patterns can be identified when a pulse pattern generator provides a test data signal to an equivalent time oscilloscope. The provided test data signal has a cyclical data pattern and a trigger signal at the cycle frequency of the data pattern that enable the equivalent time oscilloscope to acquire samples of a designated bit pattern within the signal based on the timing location of the bit pattern relative to the trigger signal. However, the cyclical characteristics and trigger signal of the test data signal provided by the pulse pattern generator are generally not present in live data signals within a communication system, making equivalent time samplers not feasible for viewing designated bit patterns in the live data signal. Accordingly, there is a need for an equivalent time sampling scheme that enables designated bit patterns within a live data signal to be captured.
SUMMARY OF THE INVENTION
A capture scheme constructed according to the preferred embodiment of the present invention detects repetitive occurrences of finite-length bit patterns within an applied data signal to provide trigger events for equivalent time sampling of the data signal. The capture scheme acquires samples within designated bit patterns of the data signal, independent of whether the data signal is random in nature, since the designated bit patterns occur repetitively within the data signal. In an apparatus implementation of the capture scheme, a pattern detector detects a designated finite-length bit pattern within the applied data signal and generates trigger events responsive to the occurrences of the bit pattern. An equivalent time sampler receives the data signal and trigger events to acquire samples of the data signal within the designated bit pattern. A programmable input enables particular bit patterns to be designated according to predefined criteria, depending on the characteristics of the data signal that are sought.
The capture scheme is alternatively implemented as a method including the steps of detecting a designated bit pattern, generating trigger events responsive to the occurrences of the bit pattern and acquiring equivalent time samples of the data signal according to the trigger events.
REFERENCES:
patent: 5384828 (1995-01-01), Brown et al.
patent: 5694425 (1997-12-01), Suganuma et al.
patent: 6286124 (2001-09-01), Hooper et al.
Agilent Technologie,s Inc.
Chung Phung M.
Imperato John L.
LandOfFree
Equivalent time capture scheme for bit patterns within high... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Equivalent time capture scheme for bit patterns within high..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Equivalent time capture scheme for bit patterns within high... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2816379