Equalizers and methods for equalizing

Details Equalizers and methods for equalizing Equalizers and methods for equalizing

2005-12-28

2010-06-08

Payne, David C (Department: 2611)

Pulse or digital communications

Equalizers

Automatic

Reexamination Certificate

active

07733950

ABSTRACT:
Equalizers and methods of equalizing, wherein an equalizer may include includes n (where n is an integer ≧) biquad circuits each include an input node, a biquad band pass node and a biquad low pass node, a first summing circuit summing an output of the biquad band pass node of the nth biquad circuit and an output of the biquad low pass node of the nth biquad circuit, a second summing circuit subtracting the output of the biquad low pass node of the (n−1)th biquad circuit from the output of the first summing circuit and amplifying the summed result by a constant, and a third summing circuit summing an output of the second summing circuit and the output of the biquad low pass node of the nth biquad circuit, wherein the n biquad circuits are Gm-C biquad circuits each having transconductors connected in a self-feedback configuration to the biquad band pass node of the corresponding n biquad circuit. The equalizer may increase a filter bandwidth and/or maintain a specific boosting gain while reducing circuit size.

REFERENCES:
patent: 6184748 (2001-02-01), Rao et al.
patent: 6304134 (2001-10-01), Pavan
patent: 2007/0126408 (2007-06-01), Sakai
Chinese Office Action dated Mar. 13, 2009.

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