Equalizer with combined CCK encoding-decoding in feedback...

Details Equalizer with combined CCK encoding-decoding in feedback... Equalizer with combined CCK encoding-decoding in feedback...

2008-01-29

2008-01-29

Fan, Chieh M. (Department: 2611)

Pulse or digital communications

Equalizers

Automatic

C375S229000, C375S295000, C375S316000

Reexamination Certificate

active

07324590

ABSTRACT:
A decision feedback equalizer includes a chip estimate buffer that forms chip estimates into a vector. A CCK decoder decodes the vector of chip estimates, and a CCK encoder, connected with the CCK decoder, re-encodes the vector of chip estimates into a valid CCK code word. At the same time, a chip slicer provides direct sliced chips from the chip estimates. An update module then forms a hybrid vector from the valid CCK code-word and the direct sliced chips for input to the feedback filter of the decision feedback equalizer. The hybrid feedback filter input vector reflects the CCK coding gain of its re-encoded portion thereby reducing the estimated chip error rate to improve the performance of the decision feedback equalizer.

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patent: 0072540 (2000-11-01), None
Cheol-Hee Park et al.; “Low-complexity channel estimator for high-rate personal area networks employing CCK modulation”: ICC 2001. 2001 IEEE International Conference on Communications. Conference Record Helsinky, Finland Jun. 2001, pp. 431-434.

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