EPROM source bias circuit with compensation for processing chara

Details EPROM source bias circuit with compensation for processing chara EPROM source bias circuit with compensation for processing chara

1992-01-09

1993-06-08

Gossage, Glenn

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365185, 365211, 365212, G11C 1606

Patent

active

052185710

ABSTRACT:
An electrically programmable read only memory (EPROM) source bias circuit provides a bias voltage at the source of an EPROM transistor which may vary with EPROM processing characteristics. The source bias circuit includes a reference voltage generator which generates a reference voltage which varies with EPROM transistor cell conductivity, and a source bias element which sets the voltage on the source node of the EPROM transistor during programming. The circuit functions to provide a greater amount of source bias to a higher-conductivity EPROM cell during programming, and to apply a lower source bias voltage to low conductivity EPROM cells. Programming efficiency of the EPROM transistor is improved, and yield of EPROM devices employing the circuit is enhanced.

REFERENCES:
patent: 4542485 (1985-07-01), Iwahashi et al.
patent: 5051953 (1991-09-01), Kitazawa et al.

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