Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state
Reexamination Certificate
1999-06-15
2001-04-17
Hiteshew, Felisa (Department: 1765)
Single-crystal, oriented-crystal, and epitaxy growth processes;
Forming from vapor or gaseous state
C117S002000, C117S003000, C117S009000, C117S902000
Reexamination Certificate
active
06217650
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process of fabricating epitaxial wafers, and more particularly to a process of fabricating epitaxial wafers of a small haze level.
2. Description of the Related Art
There is known a process of fabricating epitaxial wafers in a manner that an epitaxial layer of monocrystalline silicon is formed on the mirror-polished surface of a silicon wafer by an epitaxial growth process.
Current integrated semiconductor devices increase their integration densities at remarkable speeds. In this circumstance, semiconductor designers are consistently put under strong pressure of device performance improvements, such as reduction of power dissipation and increase of operating speed. In this connection, further improvement of the flatness of the epitaxial wafer and reduction of particles of 0.1 &mgr;m are essential to the integrated semiconductor devices of 0.18 &mgr;m or smaller design rule. To this end, it is necessary to suppress the growth of the surface roughness of the wafer, which is caused in the epitaxial growth process. The lowering of a haze level on the epitaxial wafer is required for detecting fine particles of 0.1 &mgr;m or smaller on the epitaxial wafer. The haze is due to scattering of light reflected on the wafer surface, and appears as a noise component in an output signal of an optical particle counter. Increase of the haze level indicates increase of the surface roughness of the epitaxial wafer. The haze is light scattering on the wafer surface, and appears as a noise component in an output signal of an optical particle counter when particles above the wafer surface is measured by the particle counter. Therefore, a degree of the surface roughness of the epitaxial layer formed on the silicon wafer is likely to increase with increasing the haze level. Further high haze level makes it difficult to detect fine particles of 0.1 &mgr;m or smaller. Reduction of the haze level on the epitaxial wafer is essential to the highly integrated semiconductor devices.
There are many proposals of epitaxial wafer fabricating processes to lower the haze level. JP-A-9-63956 is a typical example of those proposals. The publication shows low pressure epitaxial growth technique in low temperature conditions to lower the haze level. More precisely, a silicon wafer, mirror polished, is put in a reaction furnace, and an anneal gas of hydrogen (H
2
) is injected into the reaction furnace till a predetermined pressure of the injected gas therewithin is reached. The reaction furnace is maintained at an anneal temperature for predetermined period of time, whereby an annealing process is performed within the reaction furnace. The hydrogen is discharged from the reaction furnace to set up a vacuum therein. A reactive gas containing hydrogen and dichlorosilane (SiH
2
Cl
2
) is supplied into the vacuum reaction furnace till a pressure of the injected gas therewithin is approximately 13.3 kPa. The reaction furnace is maintained at a growth temperature T (=900° C. or lower) for a predetermined period of time; a thin monocrystalline silicon layer is expitaxially formed on the surface of the epitaxial wafer.
The silicon wafer fabricating process disclosed in the Japanese publication mentioned above has the following problems.
The epitaxial growth process is categorized into a low-pressure epitaxial growth process and an atmospheric pressure epitaxial growth process. In the former process, the reaction gas is set at a low pressure of about 13.3 kPa. In the latter process, the reaction gas is set at a atmospheric pressure. The low-pressure epitaxial growth process is superior to the atmospheric pressure epitaxial growth process in that the thickness and a resistivity of the epitaxial layer is controllable with higher precision. The former is inferior to the latter in that a growth rate of the expitaxial layer is slower and hence, and hence the wafer production efficiency is unsatisfactory. The low-pressure epitaxial growth process has additional disadvantages. When a dopant is boron or phosphorus, its auto-doping quantity is likely to increase. Additional equipment, such as a vacuum pump, are required since the vacuuming of the reaction furnace is essential. This results in complexity of the wafer fabricating equipment and increase of cost to manufacture.
As described above, in the publication wafer fabricating technique, the epitaxial growth process is performed at about 13. 3 kPa (10. 6 kPa in the embodiment), and hence the productivity is low. Also when the atmospheric pressure epitaxial growth process is used to improve the productivity in producing the epitaxial wafers, the requirement of the haze level reduction exists also the normal-pressure process is used for improving the productivity in producing epitaxial wafers. However, the haze-level reduction technique employed is not matured yet in the atmosphereic pressure epitaxial growth process.
Fine particles generated within the fabricating equipment, and dust particles generated in handling the epitaxial wafers attach to the surface of the epitaxial wafer. Accordingly, surface defects inevitably occur in the epitaxial wafers. Those fine particles and the surface defects are detected by use of a particle counter. The particles as well as the haze level deteriorate the quality of the semiconductor device. The necessity is that the number of particles of 100 nm or smaller (particle diameter) present on the epitaxial wafer should be smaller than a predetermined number of particles, and that the future semiconductor products should be guaranteed on the number of such fine particles. To the guarantee, it is necessary to measure the number of the particles present on the epitaxial wafer. The optical particle counter, usually used, cannot detect particles of 100 nm or smaller in particle diameter since optical signals representative of light reflected by such fine particles sink into the noise of the particle counter, viz., optical signals caused by the haze on the epitaxial wafer.
Therefore as the haze level is higher, an accurate measurement by the particle counter is more difficult. This tendency makes it difficult to guarantee the number of fine particles and hence the product quality of the produces epitaxial wafers.
On the other hand, atmospheric-pressure epitaxial growth process can grow the epitaxial layer at high rate, but the epitaxial layer formed is susceptible to a thermal stress and poor in quality.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a process of fabricating epitaxial wafers which fabricates epitaxial wafers giving rise to haze low in level by use of the atmospheric-pressure epitaxial growth process.
Another object of the present invention is to provide a process of fabricating epitaxial wafers which forms Si epitaxial layer of good quality by lessening a thermal stress of the layer.
According to an aspect of the present invention, there is provided a first epitaxial-wafer fabricating process for epitaxially growing a silicon layer on the surface of a silicon wafer having the crystal orientation <100> or <111> and an inclination angle of 0°±1° in a reactive gas at an atmospheric pressure, wherein a growth temperature T is lower than a normal temperature by 50° C. to 100° C. during the process of epitaxial growth.
The inventor(s) found the following fact: A silicon wafer of <100> in crystal orientation and 0°±1° in an inclination angle exhibits a minimum haze level if a growth temperature T is lower than a normal temperature by 50° C. to 100° C. during the process of epitaxial growth (in the case of a dichlorosilane gas as a source gas, the growth temperature is 950° C. to 1050° C.). The invention was based on this discovery. If so selected, the haze level on the surface of the fabricated epitaxial wafer is lowered. This leads to reduction of an S/N of an output signal of a particle counter when it measures a haze level of the fabricated epitaxial wafer, viz., improvement of
Danbata Masayoshi
Hirose Takeshi
Kawahara Hiroyuki
Tamura Takeo
Hiteshew Felisa
Komatsu Electronic Metals Co. Ltd.
Sheridan & Ross P.C.
LandOfFree
Epitaxial-wafer fabricating process does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Epitaxial-wafer fabricating process, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Epitaxial-wafer fabricating process will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2463376