Epitaxial SiOx barrier/insulation layer

Details Epitaxial SiOx barrier/insulation layer Epitaxial SiOx barrier/insulation layer

1998-11-09

2002-04-23

Dang, Trung (Department: 2823)

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

C438S479000, C438S404000, C438S413000

Reexamination Certificate

active

06376337

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to an insulating layer/barrier for deposition on a silicon substrate and/or epitaxial silicon surface, composites and structures comprising said insulating layer/barrier, method of making the composites and structure, as well as use of the insulating layer/barrier, composites and structures in the construction of improved semiconductor devices, including but not limited to quantum well, tunneling, metal oxide, SOI, superlattice, and three dimensional architecture. The insulating layer/barrier is formed by combining silicon with one or more elements to form an insulating compound of silicon where one of the possible elements is oxygen, forming a layer of SiO
x
where 0<x<2.0. The insulating layer structure is produced in such a way to allow for low defect epitaxial silicon to be deposited next to the insulating layer. It further relates to forming a number of such layers sandwiched between epitaxial silicon.
2. Description of Related Art
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4
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the disclosure of each being incorporated herein by reference.
Silicon dioxide (SiO
2
) has been used for many years as an insulating material in semiconductors. It has excellent insulating properties and provides a potential barrier typically of 3.2 eV. However, when SiO
2
is grown adjacent to silicon, there is a high mismatch between monocrystalline or epitaxial silicon and the layer of SiO
2
resulting in accumulated stress. These stresses, and therefore strains, cause the SiO
2
to become amorphous preventing the subsequent growth of epitaxial layers. Monocrystalline silicon in the semiconductor industry is available in the form of thin round disks called wafers. These single crystal wafers are produced by growing single crystal ingots from molten silicon which are then sliced and polished into a final “wafer” upon which semiconductor devices and integrated circuits are manufactured. Matthews and Blakeslee
(13)
showed that if the thickness of the “strain” layer is thin enough so that the stored strain energy is kept below a critical value, a defect-free superlattice is possible for lattice mismatched systems and hence epitaxial silicon can proceed.
In Tsu U.S. Pat. No. 5,216,262, (20), the disclosure of which is incorporated herein by reference, making alternating thin layers of SiO
2
and epitaxial silicon was claimed as a way to make a barrier material adjacent to which epitaxial silicon can be grown with a low number of defects. Although such a barrier is feasible
(3,4,22)
, the cost of controlling the process to precisely deposit SiO
2
in thin layers adjacent to epitaxial silicon in a superlattice is difficult and expensive.
Silicon on Insulator (SOI):
Current silicon devices are limited by inherent parasitic circuit elements due primarily to junction capacitance and leakage currents. These problems can be addressed for silicon by fabricating silicon devices in a thin epitaxial layer on top of a buried insulator layer, the so-called silicon on insulator (SOI) approach. This approach allows devices to be isolated from the substrate as well as from each other, eliminating the need for structures such as guard-rings, isolation junctions, etc.
(26)
A number of technologies have been developed to place an insulating layer under a layer of low defect silicon which forms the substrate upon which silicon devices are fabricated. This insulating layer reduces the amount of leakage current as well as the junction capacitance thus significantly improving the device performance. Advantages include substantially reduced power consumption, more efficient low-voltage operation, significantly improved speed, radiation hardening and reduced integrated circuit manufacturing costs. These characteristics make SOI wafers well-suited for many commercial applications, including cellular phones, wireless communications devices, satellites, portable and desktop computers, automotive electronics, and microwave systems.
One method of producing SOI wafers is by implanting oxygen ions below the surface of a silicon wafer in sufficient quantity to transform, with proper annealing, a layer of the silicon to silicon dioxide, while maintaining a thin layer of device quality epitaxial silicon at the surface. During implantation of the oxygen ions through the silicon surface, the surface is damaged reducing the quality of the epi-layer upon which devices are fabricated. Annealing can reduce the oxygen inclusion, however it is difficult to reduce the [0] to values below 10
17
/cm
3
. The thickness of the insulating layer is very difficult to control due to the random nature of scattering arising from ion implantation. Also, the ion implantation equipment costs are expensive.
A second method of production is silicon-on-sapphire (“SOS”). In SOS technology, circuitry is constructed in a layer of silicon, which has been deposited on a sapphire substrate. This material has been used in the construction of radiation resistant circuits. However, there are several problems with this material, including large current conduction in the sapphire when exposed to radiation, brittleness causing breakage during integrated circuit fabrication and large mismatches between sapphire and silicon crystal structures. These problems have led to performance and manufacturability limitations.
A third method of production involves the bonding of two thin film wafers. In this approach, two bulk silicon wafers, each with a thermally grown oxide layer, are first bonded together to form a silicon/silicon dioxide/silicon wafer. Thin-film bonded wafers are constructed by bonding the two wafers and then thinning one of the two layers. Several alternatives are currently being explored across the industry to perform the subsequent thinning proces

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