EPI substrate with low doped EPI layer and high doped Si...

Details EPI substrate with low doped EPI layer and high doped Si... EPI substrate with low doped EPI layer and high doped Si...

2008-09-30

2011-12-06

Dickey, Thomas L (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE21663, C365S145000, C438S003000

Reexamination Certificate

active

08072016

ABSTRACT:
The fabrication of seek-scan probe (SSP) memory devices involves processing on both-sides of a wafer. However, there are temperature restrictions on the mover circuitry side of the wafer and doping level constrains for either side of wafer. Using a low doped EPI layer on a highly doped substrate solves this issue and provides good STO growth.

REFERENCES:
patent: 2010/0002563 (2010-01-01), Kim et al.

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