Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2007-04-24
2007-04-24
Hoang, Quoc (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S024000, C257SE29316, C439S916000, C439S095000
Reexamination Certificate
active
11307830
ABSTRACT:
A transistor having a bottom dielectric layer, a first layer, a second layer, a top dielectric layer, and a gate electrode. The first layer and the second layer form a composite quantum well between the bottom dielectric layer and the top dielectric layer. The first layer, the second layer, and the top dielectric layer are configured to form a hole wire in the first layer. The gate electrode is over a portion of the hole wire and divides the top dielectric layer into a source contact and a drain contact.
REFERENCES:
patent: 5654558 (1997-08-01), Meyer et al.
patent: 5665618 (1997-09-01), Meyer et al.
patent: 5804475 (1998-09-01), Meyer et al.
Jones et al., “Quantum steering of electron wave function in an InAs Y-branch switch”Appl. Phys. Lett., 86, 073177 (2005).
Hu et al., “On-demand single-photon source using a nanoscale metal-insulator-semiconductor capacitor”Nanotechnol., 16(8), 1354 (2005).
Lyanda-Geller Yuli
Yang Chia-Hung
Yang Ming
Grunkemeyer Joseph T.
Hoang Quoc
Karasek John J.
The United States of America as represented by the Secretary of
LandOfFree
Enhancement mode single electron transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Enhancement mode single electron transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Enhancement mode single electron transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3757899