Enhancement-depletion logic based on Ge mosfets

Details Enhancement-depletion logic based on Ge mosfets Enhancement-depletion logic based on Ge mosfets

1996-11-27

1998-08-25

Whitehead, Carl W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257192, 257213, 257289, 257347, H01L 2976, H01L 2994

Patent

active

057985553

ABSTRACT:
The present invention discloses a method of forming an oxide layer on a layer of germanium including the steps of depositing a layer of aluminum arsenide on the layer of germanium, of exposing the layer of aluminum arsenide to an oxidizing gas mixture so that the aluminum arsenide is oxidized to aluminum oxide, and of controlling excess arsenic released in the aluminum oxide by the exposing step, so as to ensure enhanced electrical properties in the aluminum oxide. The method is used to provide an insulating gate layer for a Ge field effect transistor by forming an oxide layer on Ge and controlling excess arsenic so as to maintain high resistivity in the oxide layer and to avoid the formation of interface surface states which degrade transistor performance. The method is also used to provide complementary metal-insulator-semiconductor logic devices based on the germanium field effect transistor.

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