Enhanced silicon-on-insulator (SOI) transistors and methods...

Details Enhanced silicon-on-insulator (SOI) transistors and methods... Enhanced silicon-on-insulator (SOI) transistors and methods...

2007-07-31

2007-07-31

Wojciechowicz, Edward (Department: 2815)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Implanting to form insulator

C438S149000, C438S439000, C438S452000, C257S347000

Reexamination Certificate

active

11106002

ABSTRACT:
Enhanced silicon-on-insulator transistors and methods are provided for implementing enhanced silicon-on-insulator transistors. The enhanced silicon-on-insulator (SOI) transistors include a thin buried oxide (BOX) layer under a device channel and a thick self-aligned buried oxide (BOX) region under SOI source/drain diffusions. A selective epitaxial growth is utilized in the source/drain regions to implement appropriate strain to enhance both PFET and NFET devices simultaneously.

REFERENCES:
patent: 2003/0223258 (2003-12-01), Wei et al.
patent: 2005/0116290 (2005-06-01), de Souza et al.

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