Enhanced silicidation of polysilicon gate electrodes

Details Enhanced silicidation of polysilicon gate electrodes Enhanced silicidation of polysilicon gate electrodes

2005-03-15

2005-03-15

Kang, Donghee (Department: 2811)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S649000, C438S651000, C438S656000, C438S659000, C438S664000, C438S682000, C257S414000, C257S768000, C257S769000, C257S770000

Reexamination Certificate

active

06867130

ABSTRACT:
Semiconductor devices exhibiting reduced gate resistance and reduced silicide spiking in source/drain regions are fabricated by forming thin metal silicide layers on the gate electrode and source/drain regions and then selectively resilicidizing the gate electrodes. Embodiments include forming the thin metal silicide layers on the polysilicon gate electrodes and source/drain regions, depositing a dielectric gap filling layer, as by high density plasma deposition, etching back to selectively expose the silicidized polysilicon gate electrodes and resilicidizing the polysilicon gate electrodes to increase the thickness of the metal silicide layers thereon. Embodiments further include resilicidizing the polysilicon gate electrodes including a portion of the upper side surfaces forming mushroom shaped metal silicide layers.

REFERENCES:
patent: 5953612 (1999-09-01), Lin et al.
patent: 6187675 (2001-02-01), Buynoski
patent: 6620664 (2003-09-01), Ma et al.
patent: 6657244 (2003-12-01), Dokumaci et al.

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