Enhanced reset and built-in self-test mechanisms for single func

Details Enhanced reset and built-in self-test mechanisms for single func Enhanced reset and built-in self-test mechanisms for single func

1997-12-19

2000-06-06

Hua, Ly V.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

714 27, 714 43, G06F 1100

Patent

active

060732539

ABSTRACT:
An apparatus, system and method permitting a variety of reset procedures and corresponding reset states. A device reset control register is provided for each I/O device adapter in single function or multifunction devices. The device reset control registers permit a greater degree of control over single function devices, multifunction device as a whole and individual device functions within a multifunction device. A device immediate status register synchronizes the various reset procedures. A logical power on reset procedure, a directed unit reset procedure and a directed interface reset procedure utilize the greater degree of control that the device reset control registers provide to force the I/O device adapter, single function device or multifunction device into a corresponding logical power on reset state, a directed unit reset state or a directed interface reset state. Each of these reset states is well-defined and has the advantage of predictable behavior during and after execution of the corresponding reset procedure. A built-in self-test procedure is also defined that sequentially examines each function associated within a multifunction device connected to the local bus to coordinate the initiation, execution and completion of built in self-tests.

REFERENCES:
patent: 5748640 (1998-05-01), Jiang et al.
patent: 5878237 (1999-03-01), Olarig
IBM Technical Disclosure Bulletin, vol. 39, No. 01, Jan. 1996, entitled "Method for Atomic Peer Communication on a Peripheral Component Interconnect Bus" by B. E. Bakke et al.
IBM Patent Application (Docket RO997-066) entitled "Dynamic Configuration System, Apparatus and Method for Dynamically Configuring I/O Device Adapters" filed Dec. 19, 1997 (SN 08/995,157).

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