Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2005-09-06
2005-09-06
Williams, Alexander Oscar (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S737000, C257S778000, C257S779000, C257S780000, C257S781000, C257S668000, C257S772000, C257S703000, C257S734000, C228S180220, C228S103000, C228S104000, C228S105000, C228S254000, C174S261000, C174S260000, C174S266000, C361S767000, C361S768000, C361S760000, C029S832000, C029S833000, C029S840000
Reexamination Certificate
active
06940168
ABSTRACT:
A ball grid array electronic package is attached to a substrate by means of solder balls and solder paste. Connection is made between a contact on the ball grid array and a solder ball by means of a first joining medium, such as a solder paste. Connection is made between a solder ball and a contact arranged on the substrate by means of a second joining medium. The contact arranged on the substrate is substantially quadrilateral in shape, and preferably substantially square in shape. Connection to the substrate, e.g., using round solder balls, is much more easily detected, e.g., by x-ray, than when using round pads, especially those having a smaller diameter than the balls.
REFERENCES:
patent: 5147084 (1992-09-01), Behun et al.
patent: 5184768 (1993-02-01), Hall et al.
patent: 5489750 (1996-02-01), Sakemi et al.
patent: 5541449 (1996-07-01), Crane et al.
patent: 5574801 (1996-11-01), Collet-Beillon
patent: 5591941 (1997-01-01), Acocella et al.
patent: 5592562 (1997-01-01), Rooks
patent: 5675179 (1997-10-01), Shu et al.
patent: 5719952 (1998-02-01), Rooks
patent: 5828128 (1998-10-01), Higashiguchi et al.
patent: 5859474 (1999-01-01), Dordi
patent: 5891754 (1999-04-01), Bowles et al.
patent: 6046068 (2000-04-01), Orava et al.
patent: 6337445 (2002-01-01), Abbott et al.
patent: 6340113 (2002-01-01), Avery et al.
patent: 6678948 (2004-01-01), Benzler et al.
patent: 2001/0031868 (2001-10-01), Saikali et al.
patent: 2002/0053466 (2002-05-01), Kusui
patent: 2 208 569 (1989-04-01), None
patent: 2 283 863 (1995-05-01), None
patent: 2 293 564 (1996-04-01), None
patent: 9-219583 (1997-08-01), None
patent: 11-4067 (1999-01-01), None
patent: 11-233936 (1999-08-01), None
patent: 2001-284789 (2001-10-01), None
Circuits Assembly (USA), vol. 6, No. 3, Mar. 1995, pp. 38-40.
Garrity John Joseph
McMorran John James Hannah
Schmeiser Olsen & Watts
Steinberg Willams H.
LandOfFree
Enhanced pad design for substrate does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Enhanced pad design for substrate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Enhanced pad design for substrate will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3398482