Enhanced domino circuit

Details Enhanced domino circuit Enhanced domino circuit

2002-10-29

2004-02-10

Tran, Anh (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C326S093000, C326S095000

Reexamination Certificate

active

06690205

ABSTRACT:

TECHNICAL FIELD
This invention relates to domino circuits.
BACKGROUND
Traditional domino-CMOS logic circuits include ‘dynamic’ and ‘static’ logic blocks. The ‘dynamic’ blocks include n-channel gates which are first pre-charged and then perform logical functions during an evaluation phase. The output of the dynamic gates is input to a ‘static’ block, typically a CMOS inverter. To utilize the time dissipated by the CMOS inverter, the static block may be replaced by other static CMOS gates or by a block of pseudo-NMOS logic. Each replacement circuit has potential drawbacks in terms of the overall speed and power consumption of the domino-CMOS circuit.


REFERENCES:
patent: 5825208 (1998-10-01), Levy et al.

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