Energy adjusted write pulses in phase-change memory cells

Details Energy adjusted write pulses in phase-change memory cells Energy adjusted write pulses in phase-change memory cells

2008-01-10

2010-12-28

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Systems using particular element

Amorphous

C365S148000, C365S189160, C365S211000

Reexamination Certificate

active

07859894

ABSTRACT:
An integrated circuit that includes a plurality of phase-change memory cells, at least one write pulse generator, and at least one temperature sensor. The plurality of phase-change memory cells are each capable of defining at least a first and a second state. The write pulse generator generates a write pulse for the plurality of phase-change memory cells. The temperature sensor is capable of sensing temperature. The write pulse generator adjusts the write pulse for at least some of the phase-change memory cells in accordance with the temperature sensed by the temperature sensor.

REFERENCES:
patent: 5784328 (1998-07-01), Irrinki et al.
patent: 6625054 (2003-09-01), Lowrey et al.
patent: 6673648 (2004-01-01), Lowrey
patent: 6735546 (2004-05-01), Scheuerlein
patent: 6791107 (2004-09-01), Gill et al.
patent: 6928022 (2005-08-01), Cho et al.
patent: 7222052 (2007-05-01), Coulson et al.
patent: 7259982 (2007-08-01), Johnson
patent: 7315469 (2008-01-01), Choi et al.
patent: 2005/0117388 (2005-06-01), Cho et al.
Ha, Y. H. et al., “An Edge Contact Type Cell for Phase Change RAM Featuring Very Low Power Consumption,” Symposium on VLSI Technology Digest of Technical Papers, pp. 2 (2003).
Horii, H. et al., “A Novel Cell Technology Using N-Doped GeSbTe Films for Phase Change RAM,” Symposium on VLSI Technology Digest of Technical Papers, pp. 2 (2003).
Hwang, Y. N. et al., “Full Integration and Reliability Evaluation of Phase-Change RAM Based on 0.24 micrometers-CMOS Technologies,” pp. 2 (2003).
Lai, Stefan et al., “OUM-A 180 nm Nonvolatile Memory Cell Element Technology for Stand Alone and Embedded Applications,” IEDM Technical Digest, Session 36.5, pp. 4 (2001).
Pellizzer, F. et al., “Novel uTrench Phase-Change Memory Cell for Embedded and Stand-Alone Non-Volatile Memory Applications,” VLSI Technology Digest of Technical Papers, pp. 2 (2004).

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