Energy adjusted write pulses in phase-change memories

Details Energy adjusted write pulses in phase-change memories Energy adjusted write pulses in phase-change memories

2006-09-26

2006-09-26

Elms, Richard (Department: 2824)

Static information storage and retrieval

Systems using particular element

Amorphous

C365S158000, C365S171000, C365S173000

Reexamination Certificate

active

07113424

ABSTRACT:
A memory cell device that includes a plurality of phase-change memory cells, at least one write pulse generator, and at least one temperature sensor. The plurality of phase-change memory cells are each capable of defining at least two states. The write pulse generator generates a write pulse for the plurality of phase-change memory cells. The temperature sensor is capable of sensing temperature. The write pulse generator adjusts the write pulse for the plurality of phase-change memory cells with the temperature sensed by the temperature sensor.

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