Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-12-18
2007-12-18
Torres, Joseph D. (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S774000
Reexamination Certificate
active
10960607
ABSTRACT:
Method, system and computer program product for protecting the integrity of data transferred between an input/output bus of a data processing system and an external network. A method for protecting the integrity of data transferred between an input/output bus and a network includes generating a Cyclic Redundancy Check (CRC) value on an interface between the input/output bus and an adapter for data being transferred from the input/output bus to the network, and checking a CRC value on the interface between the input/output bus and the adapter for data being transferred from the network to the input/output bus. By adding a CRC generator and a CRC checker on the interface between the input/output bus and the adapter, end-to-end data integrity protection is provided for data transferred between the input/output bus and the network.
REFERENCES:
patent: 4907228 (1990-03-01), Bruckert et al.
patent: 5577196 (1996-11-01), Peer
patent: 6647528 (2003-11-01), Collette et al.
patent: 2002/0080821 (2002-06-01), Hwang
Gallagher James R.
Hua Binh K.
Kodukula Sivarama K.
Ratcliff Bruce Henry
Gerhardt Diana R.
International Business Machines - Corporation
Torres Joseph D.
Yee Duke W.
Yociss Lisa L. B.
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