Encoding method, transmitter, network element and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S786000, C341S067000

Reexamination Certificate

active

07634704

ABSTRACT:
The invention relates arranging information bits in an information matrix; encoding rows of the information matrix for generating a base code matrix; generating a parity check row for the base code matrix to obtain an extended code matrix; shifting predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; and derotating the rows of the following extended code matrix for generating a multiple parity code matrix.

REFERENCES:
patent: 2001/0050622 (2001-12-01), Hewitt et al.
patent: 2002/0147954 (2002-10-01), Shea
patent: 2004/0199847 (2004-10-01), Calabro et al.
patent: 1225705 (2001-12-01), None
A. Hunt, et al.; “Hyper-Codes: High-Performance, Low-Complexity Codes”; 2000; pp. 121-124 XP 002510703.
A. Hunt, et al.; “Hyper-Codes: High-Performance Low-Complexity Error-Correcting Codes”; 1998; pp. 1-5 XP 002570704.
A. W. Hunt; “Hyper-Codes: High-Performance Low-Complexity Error-Correcting Codes”; 1998; whole document XP-002510705.
European Search Report, PCT/FI2006050202 dated Jan. 30, 2009.

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