Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1999-12-08
2003-04-29
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S755000, C714S761000
Reexamination Certificate
active
06557139
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an encoding method and an encoding apparatus for multidimensionally coding information to be transmitted in a communication system. The present invention further relates to a decoding method and a decoding apparatus for iterative decoding of multidimensionally coded information. The encoding method, the encoding apparatus, the decoding method and the decoding apparatus of the present invention may be implemented in a communication unit of a communication system, e. g. a wireless telecommunication system.
During the transmission of information from a transmission unit to a receiving unit, e. g. from a base station to a mobile station of a wireless telecommunication system, errors may occur in disturbed transmission channels. These errors have to be detected and eventually corrected in the receiving unit. Channel coding is used to provide a possibility for the detection and correction of errors in the transmitted information. The channel code usually comprises additional error code symbols or error code bits, which are added to the information to be transmitted. These redundant error bits are transmitted with the information and are decoded on the receiving side, so that errors in the transmitted information can be detected and eventually corrected.
In order to provide a channel code, an encoding apparatus comprised in the transmission unit derives error code bits from the information bits by means of a corresponding coding method. On the receiving side, the error code bits enable to detect disturbed information bits. Depending on the size and the location of the error and the amount of error code bits it is eventually possible to correct the errors.
For such a channel coding, multiple encoding methods may be used. One of these encoding methods is the multidimensional coding. One of the multidimensional coding types are parallel concatenated systematic recursive codes, so-called turbo-codes, which are e. g. described in C. Berrou “Near Shannon limit error-correcting and decoding:
Turbo-Codes (1)”, Proc. ICC'93, May 1993.
Multidimensional codes are decoded on the receiving side by means of an iterative decoding processing. Thereby, a fixed number of iterations or iteration steps are performed to achieve a certain bit error rate or frame error rate. A fixed number of iterations or decoding loops, e. g. 8 or 16, is performed in the turbo decoding process to ensure a sufficient overall performance.
In 
FIG. 1
, a known encoding structure of an encoding apparatus with a code rate of {fraction (
1
/
3
)} is shown. The input information is an encoded block of N bits, which are encoded in the encoding apparatus and output on three output lines. The known encoding apparatus shown in 
FIG. 1
 generally consists of a first constituent encoder 
1
 and a second constituent encoder 
2
. The first constituent encoder 
1
 is provided with unchanged input information, whereas the second constituent encoder 
2
 is provided with input information processed in a turbo interleaving means 
3
.
The first constituent encoder 
1
 comprises a first delay means 
4
 and a second delay means 
5
. Both delay means 
4
 and 
5
 delay the respective input information by one bit. The unchanged input information supplied to the first constituent encoder 
1
 is input to the first delay means 
4
, delayed by one bit and then supplied to the second delay means 
5
 and there delayed by a further bit. The output signal from the second delay means 
5
 is fed back and added to the unchanged input information and the output signal of the first delay means 
4
 in an adding means 
6
. The output signal from the adding means 
6
 is supplied to the delay means 
4
 as well as to an adding means 
7
. In the adding means 
7
, the output signal from the adding means 
6
 is added to the output signal of the second delay means 
5
. The output signal of the adding means 
7
 is the second output (output 
1
) of the shown turbo encoding apparatus.
The input information of the encoding apparatus shown in 
FIG. 1
 is further supplied to a turbo interleaving means 
3
, where the information bits are interleaved and then supplied to a second constituent encoder 
2
. The input information of the second constituent encoder 
2
 is supplied to a first delay means 
8
, delayed by one bit, supplied to a second delay means 
9
 and delayed by a second bit there. The output signal from the second delay means 
9
 is fed back to an adding means 
10
, in which the output signal from the first delay means 
8
, and the output signal from the turbo interleaving means 
3
 and the output signal from the second delay means 
9
 are added. The output signal from the adding means 
10
 is the input of the first delay means 
8
. The output signal of the second delay means 
9
 is further fed to an adding means 
11
, in which it is added to the output signal of the adding means 
10
 to provide the third output signal (output 
2
) of the shown encoding apparatus.
The first output signal (output 
0
) of the encoding apparatus shown in 
FIG. 1
 is the unchanged input information.
The three output signals of the encoding apparatus shown in 
FIG. 1
 are then further processed and transmitted in a transmission channel to a receiving apparatus, in which they are turbo decoded, e. g. by a turbo decoding apparatus 
12
 as shown in FIG. 
2
. The known turbo decoding apparatus 
12
 shown in 
FIG. 2
 is supplied with three input signals corresponding to the three output signals of the known encoding apparatus shown in FIG. 
1
. The received information bits, which correspond to the first output signal of the encoding apparatus of 
FIG. 1
 are the unchanged information bits, which are fed to a first constituent decoder 
13
 of the turbo decoding apparatus 
12
. The received parity bits of the first code are soft parity information, which are also supplied to the first constituent decoder 
13
, correspond to the second output (output 
1
) of the encoding apparatus of FIG. 
1
. The received parity bits of the second code are soft parity information, which are fed to the second constituent decoder 
14
 of the turbo decoding apparatus 
12
 correspond to the third output (output 
2
) of the encoding apparatus shown in FIG. 
1
. The second output (output 
1
) and the third output (output 
2
) of the encoding apparatus of 
FIG. 1
 are therefore error code bits (parity bits), which are transmitted together with the unchanged information bits to provide an error code, which is used on the receiving side to detect and eventually correct errors in the transmitted information signal (output 
0
).
The received parity bits of the first code and the received information bits are supplied to the first constituent decoder 
13
 of the turbo decoding apparatus 
12
 and processed to provide decoded soft decision values, which are supplied to and processed in a deinterleaver 
15
. The deinterleaved soft decision values from the deinterleaver 
15
 are supplied to the second constituent decoder 
14
 of the turbo decoder apparatus 
12
. The received information bits are further supplied to an interleaver 
16
. The interleaved information bits from the interleaver 
16
 are also supplied to the second constituent decoder 
14
. The received parity bits of the second code are supplied to the second constituent decoder 
14
. In the second constituent decoder 
14
, the three input signals are decoding processed. The output signal from the second constituental decoder 
14
 comprises soft decision values, which are fed back to an deinterleaver 
18
. The deinterleaved soft decision values from the deinterleaver 
18
 are fed back and supplied to the first constituent decoder 
13
.
In the known turbo decoding apparatus 
12
 shown in 
FIG. 2
, the number of iterations through the deinterleaver 
18
 is a fixed number of iterations, e. g. 8 or 16 to provide a sufficient overall performance in terms of the bit error rate or frame error rate. Thereby, in each iteration step, the second constituent decoder improves the soft decision likelihood value
De'cady Albert
Dooley Matthew C.
Frommer William S.
Frommer & Lawrence & Haug LLP
Sony International (Europe) GmbH
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