Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-02-13
2007-02-13
Lamarre, Guy J. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S801000
Reexamination Certificate
active
10535925
ABSTRACT:
An encoder using LDPC (low density parity check) codes, and an encoding method. The encoder comprises a parity check matrix generator for generating a parity check matrix H; and a codeword generator for processing the parity check matrix H to generate a codeword, and the codeword generator comprises: an AB analyzer for analyzing the parity check matrix H into matrixes A and B; a pivoting unit for pivoting the parity check matrix H; a bit-reversing unit for bit-reversing the pivoted matrix; an LU analyzer for analyzing the matrix A into matrixes L and U; and a codeword generator unit for performing a logical operation on the matrixes A, B, L and U. A bit-reversing method is used to effectively generate a parity check matrix having a high girth by using a regular encoder.
REFERENCES:
patent: WO2001 097387 (2001-12-01), None
patent: WO2002 091592 (2002-11-01), None
patent: WO2004 047019 (2004-06-01), None
Ping et al. (‘Low density parity check codes with semi-random parity check matrix,’ IEEE, Jan. 1999).
Alkafaji et al. (Numerical Methogs in Engineering Practice, 1986, pp. 138-157).
‘Efficient Encoding of Low-Density Parity-Check Codes’ Richardson et al., IEEE Transactions on Information Theory, vol. 47, No. 2, Feb. 2001, pp. 638-640.
Chae Su-Chang
Choi Jung-Pil
Lee Yong-Su
Park Youn-Ok
Electronics and Telecommunications Research Institute
Ladas & Parry LLP
Lamarre Guy J.
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