Encapsulation method for fine-pitch chip-on-board

Details Encapsulation method for fine-pitch chip-on-board Encapsulation method for fine-pitch chip-on-board

1998-02-02

1999-07-27

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Encapsulating

438126, H01L 2144

Patent

active

059306041

ABSTRACT:
A process for depositing an encapsulating material (16) on and around a COB die (10) and other wire-bonded device, without producing voids that encourage premature fatigue fracturing of the material (16) and wires (14) that electrically connect the device (10) to a circuit board (12). The process generally entails mounting and wire bonding a die (10) to a circuit board (12) with multiple bond wires (14). The encapsulation material (16) is then deposited along a first edge (18) of the die, and sequentially along the remaining edges (20, 22, 24) of the die (10), each successive edge being contiguous with the preceding edge, until the entire perimeter of the die (10) is surrounded and contacted with the material (16). The encapsulation material (16) encapsulates only those portions of the wires (14) immediately adjacent the die (10), with the remainder of the wires (14) remaining exposed. The material (16) is then sequentially deposited along two separate serpentine paths (26, 28), each of which initially crosses the die (10) near its geometric center, and thereafter continues toward opposite edges of the die (10). The material (16) deposited along the serpentine paths (26, 28) encapsulates the entire die (10) and its bond wires (14).

REFERENCES:
patent: 5026669 (1991-06-01), Shinohara
patent: 5371044 (1994-12-01), Yoshida et al.
patent: 5474958 (1995-12-01), Djennas et al.
patent: 5700697 (1997-12-01), Dlugokecki
patent: 5763296 (1998-06-01), Casati et al.
patent: 5831833 (1998-11-01), Shirakawa et al.

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