Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2000-01-10
2002-11-26
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S840000
Reexamination Certificate
active
06484394
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to a ball grid array (BGA) package process used in package processes for a semiconductor device, and in particular to an encapsulation method for a BGA semiconductor package which can prevent a flash from occurring during a molding process of the BGA semiconductor package.
2. Description of the Background Art
A ball grid array (BGA) semiconductor package has been widely used because it can be used to form several pins in a limited area. Further, the BGA semiconductor package includes short external terminals, thereby preventing bending by an external shock and easily transferring an electric signal.
FIG. 1
is a plan view illustrating a printed circuit board before carrying out a conventional encapsulation process for the BGA semiconductor package.
FIG. 2
is a cross sectional view illustrating the printed circuit board for explaining the encapsulation process for the BGA semiconductor package. As depicted in
FIG. 2
, reference numerals
1
to
7
respectively indicate a dispenser
1
for injecting a liquid epoxy, a semiconductor chip
2
, a wire
3
, a dam
4
for preventing a flash from occurring, a printed circuit board
5
, a frame
6
and a liquid epoxy spread
7
within the dam. Three units are configured in a single set in
FIGS. 1 and 2
.
A conventional encapsulation method for the BGA semiconductor package will now be described with reference to
FIGS. 1 and 2
.
The chip
2
is bonded on the frame
6
with an adhesive by a die attach process. The bonded chip
2
is electrically connected to the board
5
by using the wire
3
.
In order to protect the wire
3
, an encapsulation process spreading the liquid epoxy is carried out. Here, the dam
4
of a certain height is provided to prevent the liquid epoxy discharged from the dispenser
1
from being spread. When the liquid epoxy
7
is injected by the dispenser
1
, the chip
1
and wire
3
are sealed up by the liquid epoxy
7
. Here, a height of the dam is set approximately a few tens of &mgr;m.
In general, the package process is performed on a plurality of units composing a single set. When it is presumed that three units compose a set, as shown in
FIG. 2
, the afore mentioned encapsulation process must be performed three times. That is, the dispenser
1
is positioned on a first unit, and when the liquid epoxy
7
is completely spread, the dispenser
1
is transferred to a second unit. Accordingly, it takes a longer time to carry out the encapsulation process on the three units than on a single unit by three times.
By contrast, processes other than the encapsulation process are simultaneously performed on the units composing a single set. Therefore, if the encapsulation process takes a longer time, it results in a time increase of the entire manufacturing process.
In addition, an overflow of the liquid epoxy over the dam will cause a flash. Thus, to prevent the flash from occuring the process must be precisely performed.
There is still another advantage in that the dispenser and encapsulation instruments for using the dispenser are high priced.
In order to prevent the flash from occurring, a method of covering an upper portion of the package may be employed where a molding is performed with a mold and the liquid epoxy is injected through the mold. However, this method also requires a precise process, and thus it is difficult to manage the process.
SUMMARY OF THE INVENTION
The present invention is directed to a system that substantially obviates one or more of the problems experienced due to the above and other limitations and disadvantages of the related art.
It is thus an object of the present invention to provide an encapsulation method for a ball grid array (BGA) semiconductor package capable of preventing a flash from occurring during an encapsulation process.
It is another object of the present invention to provide an encapsulation method for a BGA semiconductor package which can simultaneously carry out an encapsulation process on a set consisting of a plurality of units.
It is still another object of the present invention to provide an encapsulation method for a BGA semiconductor package which can prevent a flash from occurring without using a dam.
Other and further objects, features and advantages of the present invention will be set forth in the description that follows, and in part will become apparent from the detailed description, or may be learned by practice of the invention.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the present invention includes an encapsulation method for a BGA semiconductor package, including: adhering an one side adhesive tape with a cavity of a certain size at its center portion to an upper portion of a printed circuit board after performing a wire bonding; carrying out a molding by using a mold; and removing the one side adhesive tape when the molding is completed.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. Thus, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of example only. Various changes and modifications that are within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description. In fact, other objects, features and characteristics of the present invention; methods, operation, and functions of the related elements of the structure; combinations of parts; and economies of manufacture will surely become apparent from the following detailed description of the preferred embodiments and accompanying drawings, all of which form a part of this specification, wherein like reference numerals designate corresponding parts in various figures.
REFERENCES:
patent: 5525547 (1996-06-01), Matsunaga et al.
patent: 3-262618 (1991-11-01), None
patent: 4-18399 (1992-01-01), None
patent: 6-238709 (1994-08-01), None
patent: 6-283828 (1994-10-01), None
Heo Seong-Jae
Song Chi-Jung
Arbes Carl J.
Hyundai Electronics Industries Co,. Ltd.
Smith Sean
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