Encapsulated chip scale package having flip-chip on lead...

Details Encapsulated chip scale package having flip-chip on lead... Encapsulated chip scale package having flip-chip on lead...

2008-04-22

2010-02-02

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Encapsulated

C257S778000

Reexamination Certificate

active

07656048

ABSTRACT:
In one embodiment, an encapsulated electronic package includes a semiconductor chip having patterned solderable pads formed on a major surface. During an assembly process, the patterned solderable pads are directly affixed to conductive leads. The assembly is encapsulated using, for example, a MAP over-molding process, and then placed through a separation process to provide individual chip scale packages having flip-chip on lead frame interconnects.

REFERENCES:
patent: 3886585 (1975-05-01), Konantz et al.
patent: 4000842 (1977-01-01), Burns
patent: 5134460 (1992-07-01), Brady et al.
patent: 5373190 (1994-12-01), Ichiyama
patent: 5554887 (1996-09-01), Sawai et al.

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