Enabling netlist for modeling of technology dependent BEOL...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C703S013000, C703S014000

Reexamination Certificate

active

07487473

ABSTRACT:
A method, system and program product are disclosed that enable a netlist of an integrated circuit (IC) design for modeling of technology dependent back-end-of-line (BEOL) process variation. In one embodiment, the method includes obtaining a netlist of electrical elements (i.e., BEOL parasitic resistance and/or capacitance), the netlist including estimated electrical values for the electrical elements and geometric data for at least one of the electrical elements; determining variations of the electrical value for a selected electrical element based on the geometric data using a scaling methodology; and placing a model call in the netlist, the model call implementing the variations of electrical value for the selected electrical element. The revised netlist can be used to model the IC design and includes a scaling of electrical values without having to generate more than one netlist.

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