Enabling memory redundancy during testing

Details Enabling memory redundancy during testing Enabling memory redundancy during testing

2011-04-19

2011-04-19

Baderman, Scott T (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S006130, C365S200000

Reexamination Certificate

active

07930592

ABSTRACT:
A design structure embodied in a machine readable medium for designing, manufacturing, testing and/or enabling a redundant memory element (20) during testing of a memory array (14), and a method of repairing a memory array.

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European Patent Office Search Report, Antonio Operti, application No. 02 797 402.1-2210, Nov. 10, 2006, pp. 1-5.

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