Enabling data access of a unit of arbitrary number of bits of da

Details Enabling data access of a unit of arbitrary number of bits of da Enabling data access of a unit of arbitrary number of bits of da

1992-08-06

1995-02-28

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Signals

365196, 365193, 36518901, 36518903, G11C 700

Patent

active

053943660

ABSTRACT:
A DRAM device includes a read control circuit for inhibiting read out of one or more bits of a multi-bit data output from a plurality of memory cells in response to a bit designating signal for specifying the one or more bits. By arbitrarily setting the number of bits to be output from the DRAM device and combining that output with data from one or more additional memory devices, data of an arbitrary number of bits can be generated at a high speed.

REFERENCES:
patent: 4669064 (1987-05-01), Ishimoto
patent: 4897818 (1990-01-01), Redwine et al.
patent: 5313624 (1994-05-01), Harriman et al.
"Home VTR Containing Field Memory for Correcting Crossbar and Skew Distortion in Search Mode", Nikkei Electronics, vol. 406, Oct. 20, 1986, pp. 195-214.

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