Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1998-04-07
2000-11-07
Iqbal, Nadeem
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
39550049, S06F 1100
Patent
active
061451037
ABSTRACT:
A microcontroller-based device according to the present invention provides a watchdog timer having an emulator support mode for disabling and reconfiguring time-outs. When the watchdog timer is placed in the emulator support mode, the watchdog timer is inhibited from counting. In a disclosed embodiment, the watchdog timer is inhibited from counting by deasserting a count enable signal. A watchdog time-out is thus prevented from occurring during the emulator support mode. Also, during the emulator support mode, the watchdog timer control register is writable, allowing the emulator to disable a watchdog timer, enable the timer, or program a new time-out value for the timer. The watchdog timer control register is writable regardless of the state of the enable bit of the timer. Further, in the emulator support mode, a watchdog timer current count becomes readable and writable at a predetermined register address above the watchdog timer control register subsequent to a write of a write key sequence to the watchdog timer control register. By writing and reading the predetermined register address location, the emulator is able to define and monitor a condition as the watchdog timer is approaching its timeout value. By monitoring a condition as the watchdog timer approaches its timeout value, a software debugger may better predict and appreciate the behavior of a microcontroller-based device prior to a watchdog time-out. In a disclosed embodiment, the watchdog timer current count is readable and writable through a watchdog timer count high register and a watchdog timer count low register.
REFERENCES:
patent: 4099255 (1978-07-01), Stanley et al.
patent: 4998197 (1991-03-01), Kurakazu et al.
patent: 5084814 (1992-01-01), Vaglica et al.
patent: 5233613 (1993-08-01), Allen et al.
patent: 5493659 (1996-02-01), Kurakau et al.
patent: 5511209 (1996-04-01), Mensch, Jr.
patent: 5541943 (1996-07-01), Niescier et al.
patent: 5644703 (1997-07-01), Kurakazu et al.
patent: 5790833 (1998-08-01), Gulick et al.
Am186.TM.Er and Am188.TM.Er, Chapter 8, Watchdog Timer, .COPYRGT. 1998 Advanced Micro Devices, Inc.
Am186.TM.Es and Am188.TM.Es, Advanced Micro Devices, Jan. 1996, Publication #20002.
Am186.TM.ED/EDLV, Advanced Micro Devices, May 1997, Publication #21336.
Microchip PIC16/17 Microcontroller Data Book, Microchip Technology, Inc., May 1995, pp. ii, 2-825, 2-921, 2-925, 2-926, 2-929, and 2-936.
Maupin Patrick E.
Typaldos Melanie D.
Advanced Micro Devices , Inc.
Iqbal Nadeem
LandOfFree
Emulator support mode for disabling and reconfiguring timeouts o does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Emulator support mode for disabling and reconfiguring timeouts o, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Emulator support mode for disabling and reconfiguring timeouts o will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1652844