Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-06-06
2006-06-06
Baderman, Scott (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C703S023000, C703S028000
Reexamination Certificate
active
07058855
ABSTRACT:
An integrated circuit with multiple circuit cores each of which have integrated emulated circuits, and an emulation interface module, such that the integrated circuit has an on-chip debugging system. As cores other than a processor core have integrated emulation circuits, debugging of programs and operations of systems-on-a-chip becomes viable.
REFERENCES:
patent: 5107450 (1992-04-01), Lawrenz
patent: 5878247 (1999-03-01), Cho
patent: 6425101 (2002-07-01), Garreau
patent: 6738929 (2004-05-01), Swoboda et al.
patent: 6836882 (2004-12-01), Swoboda
patent: 6918065 (2005-07-01), Edwards et al.
patent: 2002/0046016 (2002-04-01), Debling
patent: 2002/0147939 (2002-10-01), Wenzel et al.
patent: 2002/0194538 (2002-12-01), Barrenscheen et al.
Microsoft, Microsoft Computer Dictionary, 2002, Microsoft Press, Fifth Edition, pp. 27, 128, 149, 159, 162, 186, 195, 198, 216, 232, 297, 350, 426, 437, and 456.
Agrawal, V.D., et al., “A Tutorial on Built-In Self-Test:: Part 1: Principles,” IEEE Design and Test of Computers, Mar. 1993, pp. 1-12.
Agrawal, V.D., et al., “A Tutorial on Built-In Self-Test: Part 2: Applications,” IEEE Design and Test of Computers, Jun. 1993, pp. 1-11.
Howard, S., “A Backgroud Debugging Mode Driver Package for Modular Microcontrollers,” Motorola Semiconductor Application Note, 1996, pp. 1-16.
Murray, B.T., et al., “Testing ICs: Getting to the Core of the Problem,” Computer, Nov. 1996, pp. 1-9.
Kaskowitz, M., “System Design in the 21stCentury,” Mentor Graphics, http://www.mentorg.com/embedded/articles/enews—40901.html, Jun. 25, 2001, pp. 1-2.
“SoC Solutions: Embedded Software: The new element of SOC systems design,” Mentor Graphics, http://www.mentorg.com/soc/embedded.html, Jun. 25, 2001, p. 1.
Oakes, C., et al., “One Processor Fits All,” Wired News, http://www.wired.com
ews/technology/0,1282,16239.00.html, Jun. 25, 2001, pp. 1-2.
“System-on-Chip Markets and Trends: A Comprehensive Report Examining Global Markets and Applications for System-Level Semiconductor Products,” Electronic Trend Publications, http://www.electronictrendpubs.com/soc.htm, Jun. 25, 2001, pp. 1-7.
“EDA WATCH: System Chip Verification: Moving From ASIC-Out To ‘System-In’ Methodologies,” Electronic Design, http://www.planetee.com/planetee/servlet/DisplayDocument?ArticleID=1001, Jun. 25, 2001, pp. 1-4.
“TechEncyclopedia: System On a Chip,” TechWeb: The Business Technology Network, http://www.techweb.com/encyclopedia/defineterm.yb?term=SoC, Jun. 25, 2001, pp. 1-2.
Clarke, P., et al., “SoCs Mark Dawn Of Golden Era,” TechWeb: The Business Technology Network, http://content.techweb.com/wire/story/TWB20001127S0009, Nov. 27, 2000, Munich, Germany, pp. 1-2.
Semiconductor Business News, “System-On-Chip Market To Boom By 2004,” TechWeb: The Business Technology Network, http://content.techweb.com/wire/story/TWB20001025S0014, Oct. 25, 2000 pp. 1-2.
Leopold, G., “Net Will Drive System-On-Chip Development,” TechWeb: The Business Technology Network, http://content.techweb.com/wire/story/TWB19990916S0003, Sep. 16, 1999, pp. 1-2.
“ASIC Core Libraries,” ROHM, http://www.rohm.com/products/shortform/01asic/4core.html, Jul. 23, 2001, pp. 1-2.
“Embedded Software Debugging for MIPS32 Systems-on-Chip,” Mentor Graphics, www.mentor.com, pp. 1-8.
“Integrated Debug of Embedded Systems With The TLA 700,” Tektronix, 1998, pp. 1-8.
IEEE-ISTO 5001™-1999, The Nexus 5001 Forum™ Standard providing the Gateway to the Embedded Systems of the Future, Ashling Microsystems Ltd., Version 1.1, Jan. 13, 2000, pp. 1-8.
JTAG (IEEE 1149.1/P1149.4, Tutorial-Introductory, 1997 TI Test Symposium, Sep. 10, 1997, pp. 1-46.
“Application Programming Interface (API),” IEEE-ISTO 5001™-1999, The Nexus 5001 Forum™ Standard for a Gloval Embedded Processor Debug Interface, Dec. 15, 1999, pp. 28-50.
Press Release: “Ashling launches initative on multi-core SoC debugging,” Ashling Microsystems, Inc., U.S., Mar. 2002.
Freiwald Axel
Rohfleisch Bernhard
Baderman Scott
Contino Paul
Infineon - Technologies AG
Slater & Matsil L.L.P.
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