Emulating a line-based interrupt transaction in response to...

Details Emulating a line-based interrupt transaction in response to... Emulating a line-based interrupt transaction in response to...

2011-07-12

2011-07-12

Phan, Raymond N (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

Multimode interrupt processing

C710S266000

Reexamination Certificate

active

07979619

ABSTRACT:
Methods, systems, apparatuses and program products are disclosed for managing interrupt services in hypervisor and hypervisor-related environments in Message Signaled Interrupts are emulated as other type(s) of interrupt.According to an aspect of the present invention, a method of executing a program includes receiving a MSI (message signaled interrupt). Responsively, a virtual interrupt is generated and an ISR (interrupt service routine) is invoked that handles a line-based virtual interrupt transaction. A surrogate or virtual peripheral device status may also be provided and may be associated with the virtual interrupt. A single device interrupt event may, in certain circumstances, be serviced both as a line-based interrupt and also as an MSI, or as either responsive to run-time context.Embodiments of the present invention enable superior tradeoffs in regards to the interrupt sharing to a greater and more flexible extent than with previous implementations. Moreover, it makes possible interrupt sharing using an ISR that was not expressly designed for interrupt sharing.

REFERENCES:
patent: 7048877 (2006-05-01), Zimmer et al.
patent: 7222203 (2007-05-01), Madukkarumukumana et al.
patent: 2009/0119087 (2009-05-01), Ang et al.
patent: 2010/0083247 (2010-04-01), Kanevsky et al.
The MSI Driver Guide HOWTO, Rev.3 (Tom L Nguyen) 2004, entire document, especially pp. 1 and 2.
82093AA I/O Advanced Programmable Interrupt Controller, Order No. 290566-001 (Intel Corporation) 1996 , entire document, especially pp. 3, 9 to 11 and 13.

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