Electrical computers and digital processing systems: processing – Processing control – Processing sequence control
Reexamination Certificate
2008-05-13
2008-05-13
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Processing sequence control
Reexamination Certificate
active
07373490
ABSTRACT:
A method in a computer system, one embodiment includes accessing a packed data instruction and generating a corresponding set of control bits to cause a processor to alter a top of stack to zero of a programmer visible register file, accessing a floating point instruction and generating a corresponding set of control bits that cause the processor to operate on the programmer visible register file as a stack, but accessing a transition instruction between the packed data instruction and the scalar floating point instruction and generating a corresponding set of control bits to cause the processor to alter tag data to indicate that programmer visible register file is empty. The method advantageously provides a means for clearing the packed data state at the end of blocks of packed data instructions to leave the floating point state in a clear condition for subsequent operations (e.g. floating point calculations).
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Bistry David
Dulong Carole
Eitan Benny
Kowashi Eiichi
Mennemeier Larry
Blakely , Sokoloff, Taylor & Zafman LLP
Coleman Eric
Intel Corporation
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