Emitter follower output with programmable current

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Bipolar transistor

Reexamination Certificate

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Details

C326S068000, C326S078000

Reexamination Certificate

active

06198309

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to emitter follower outputs. More particularly, the invention concerns an integrated circuit having emitter follower outputs and an electrical connection area that is connectable to an external circuit to program the amount of current in the emitter follower outputs.
2. Description of the Related Art
Emitter follower output stages are common components of digital logic circuitry.
FIG. 1
illustrates a typical prior art buffer circuit
100
that has emitter follower outputs. In the circuit of
FIG. 1
, the emitter of output transistor Q
1
is connected to output Y, and the emitter of output transistor Q
3
is connected to complimentary output YN. The output current I
101
for output Y is set by a constant current source consisting of transistor Q
2
and resistor R
1
. Similarly, the output current I
102
through output YN is set by a constant current source consisting of transistor Q
4
and resistor R
2
. Output currents I
101
and
102
, which are also referred to as output drive currents, primarily affect voltage fall times.
When an integrated circuit including a circuit such as circuit
100
is designed, the output currents of the circuit
100
are essentially fixed, except for resistor sheet resistance variation. Once a circuit such as circuit
100
is fabricated, the output currents are fixed. The bias voltage applied to the bases of current source transistors Q
2
and Q
4
is constrained to a range of values, which sets the output currents of the emitter follower outputs at fixed values.
The fixed output currents in emitter follower outputs such as the outputs of the circuit
100
in
FIG. 1
are typically set high enough to ensure satisfactory performance for a wide range of applications under worse case conditions, also taking into account imprecision in the output currents that may result due to manufacturing process tolerances. For example, the output currents are set high enough to adequately minimize propagation delay times and setup and hold times, and to maximize “eye openings,” in a variety of applications. A significant shortcoming of these prior art emitter follower output circuits is that many applications do not require output currents that are as large as the output currents provided by these circuits. Consequently, in many applications a substantial amount of power is wasted and a corresponding amount of heat is needlessly generated due to the excessive output currents provided by these circuits. Conversely, some applications may require output currents that are greater that the fixed output currents that are provided.
SUMMARY OF THE INVENTION
Broadly, the invention concerns an integrated circuit having emitter follower outputs with adjustable output drive currents. The integrated circuit includes an electrical connection area that is connectable to an external circuit to program the amount of current in the emitter follower outputs.
An illustrative embodiment of the invention is shown in FIG.
3
. Like the prior art circuit
100
of
FIG. 1
, the integrated circuit device
300
of
FIG. 3
includes a pair of emitter follower output transistors and their corresponding current sources. In
FIG. 3
, current source transistor Q
7
and current source resistor R
3
are connected to emitter follower output transistor Q
5
, and current source transistor Q
8
and current source resistor R
4
are connected to emitter follower output transistor Q
6
. In contrast to the prior art circuit
100
shown in
FIG. 1
, in which the output drive currents I
101
and I
102
are fixed because a constrained bias voltage is applied to the bases of the current source transistors, in the integrated circuit device
300
of
FIG. 3
the output drive currents I
301
and I
302
are programmable because the voltage applied to the bases of the current source transistors Q
7
and Q
8
is selectable. Within the operational range of the circuit, the output currents are programmed to be as low or high as required for a particular application. Programming the output currents also allows for reduction or elimination of excess output current introduced due to manufacturing tolerances. Usually, the output currents are set as low as is possible without adversely affecting circuit performance. For example, the output currents may be set as low as possible while maintaining one or more circuit parameters, such as propagation delay, waveform integrity, or jitter, at or above a target value.
In order to program the output drive currents I
301
and I
302
, the integrated circuit device
300
of
FIG. 3
includes a variable bias generator
310
that produces a bias voltage that is connected to the bases of the current source transistors Q
7
and Q
8
. The output drive currents I
301
and I
302
are determined by the bias voltage. The variable bias generator is connected to an electrical connection area
225
of the integrated circuit device
300
. An external programming circuit can be connected to the electrical connection area in order to adjust (also referred to as setting) the bias voltage, to thereby program the desired output drive currents. The external programming circuit, which is shown in
FIG. 3
as a resistance
305
, can be a resistance or an external voltage source (and could be other types of components in other embodiments). The variable bias generator can be any of a number of circuits that produce a bias voltage that is a function of the external programming circuit connected to the electrical connection area. If power conservation is not important, or if emitter follower output current reduction (or output current augmentation) is otherwise not needed, then an external programming circuit is not connected to the electrical connection area. In this case the electrical connection area is left floating, and consequently the output currents have their nominal default values.
The invention can be implemented in various embodiments, including as an integrated circuit device with programmable emitter follower output currents, and as a method for optimizing circuit parameters by programming emitter follower output currents in an integrated circuit device.
The invention affords its users with a number of distinct advantages. Chiefly, the invention provides the ability to program the output currents in emitter follower outputs on integrated circuits to increase, or more typically, to decrease the output currents. The output currents can be adjusted to not be any larger than is required for a particular application, while maintaining one or more circuit parameters, such as propagation delay, waveform integrity, or jitter, at or above a target value. This provides the benefits of not wasting power and not generating unnecessary heat, which would otherwise occur due to excessive output currents. The invention allows the internal emitter follower output currents to be adjusted easily “on the fly,” and if necessary, to be readjusted for performance/power optimization. The invention also provides other advantages and benefits, which are apparent from the following description.


REFERENCES:
patent: 3760200 (1973-09-01), Taniguchi et al.
patent: 3909636 (1975-09-01), Masaki et al.
patent: 4675555 (1987-06-01), Okajima et al.
patent: 4945263 (1990-07-01), Estrada
patent: 4988899 (1991-01-01), Jansson
patent: 5041747 (1991-08-01), Chengson et al.
patent: 5072136 (1991-12-01), Naghshineh
patent: 5302892 (1994-04-01), Tada et al.
patent: 5304856 (1994-04-01), Rainal
patent: 5323068 (1994-06-01), Freitas
patent: 5510729 (1996-04-01), Reymond
patent: 5656952 (1997-08-01), McCall et al.

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