Emitter coupled logic circuitry with additional discharge path

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Bipolar transistor

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326 89, 326130, H03K 19086

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active

060207647

ABSTRACT:
There is provided emitter coupled logic (ECL) circuitry comprising a differential amplifier circuit for receiving an input signal and a reference potential Vbb, and for causing an output circuit to make a transition to its high state by charging a parasitic capacitor which is parasitic in the output circuit, and make a transition to its low state by discharging a charge stored in the parasitic capacitor to a potential Vtt by way of a load resister, according to whether or not the level of the input signal is larger than the reference potential Vbb, and a discharge switching circuit which can switch to its conductive state in response to a control signal applied thereto so that the charge stored in the parasitic capacitor is also discharged to the negative potential Vee by way of the discharge switching circuit.

REFERENCES:
patent: 5321321 (1994-06-01), Kurisu
patent: 5514984 (1996-05-01), Nakamura
patent: 5572152 (1996-11-01), Ueda
patent: 5754062 (1998-05-01), Satoh et al.
patent: 5767702 (1998-06-01), Hense et al.
patent: 5789946 (1998-08-01), Sawairi
"Motorola MECL Integrated Circuits," Motorola MECL Device Data (from an ECL IC data book of Motorola Co.), Series E, Motorola Inc., 1987, 2 pages.
"SELIC Family Overview," SST ECL Logic IC, NEL NTT Electronics Technology Corporation, Tokyo, Japan, Feb. 1995, 2 pages.

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