Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-08-15
2006-08-15
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S710000, C714S711000, C365S200000, C365S201000
Reexamination Certificate
active
07093156
ABSTRACT:
An embedded test and repair (ETR) scheme and interface for generating a self-test-and-repair (STAR) memory device using an integrated design environment. User interface and supporting program code is operable to provide a dialog box for defining a memory group that includes one or more memory instances, each having corresponding fuse element requirements based on its configuration data. BIST elements and a processor compiler for providing ETR functionality are also specified via suitable portions of the integrated GUI. A fuse equation is employed for computing the number of fuses for each memory instance, which equation is derived based on the memory configuration. Fuse information for each memory instance is automatically passed to a fuse compiler that generates a fuse box having an appropriate number of fuses that can accommodate the fuse requirements of the memory instances of the group.
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Schober et al., “Memory Built-In Self-Repair,” 13th Workshop—Test Methods and Reliability of Circuits and Systems, Feb. 18-20, 2001.
Reichenbach Randall Lee
Shubat Alex
Beausoliel Robert
Danamraj & Youst P.C.
Guyton Philip
Virage Logic Corp.
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