Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2011-03-01
2011-03-01
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S005000, C711S156000, C711SE12014, C711SE12069
Reexamination Certificate
active
07900018
ABSTRACT:
Provided are an embedded system and a method for relocating memory pages therefor. The embedded system includes a processor, a data relocating circuit for receiving a logical address from the processor, mapping the received logical address to a physical address to locate a valid page in a predetermined bank, and generating a bank power control signal according to whether or not a corresponding memory bank includes valid pages, and a memory including a plurality of memory banks addressed by a physical address outputted from the data relocating circuit and a plurality of switching means for selectively supplying a power voltage to each of memory banks in response to the bank power control signal.
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Mahmut Kandemir, et al.; “Compiler-Guided Leakage Optimization for Banked Scratch-Pad Memories;” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, No. 10, pp. 1136-1146, Oct. 2005.
Eum Nak-Woong
Koo Bon-Tae
Kwon Young-Su
Bataille Pierre-Michel
Electronics and Telecommunications Research Institute
Ladas & Parry LLP
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