Embedded non-volatile memory cell with charge-trapping...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE27060, C438S199000

Reexamination Certificate

active

11104210

ABSTRACT:
An IC includes both “volatile” CMOS transistors (FETs) and embedded non-volatile memory (NVM) cells, both including polysilicon gate structures, sidewall oxide layers, sidewall spacer structures, and source/drain regions. The sidewall spacers of both the NVM cells and the FETs are made up of a spacer material with local charge storage nodes that is capable of storing electrical charge (e.g., silicon-nitride with traps or oxide with silicon nanocrystals). The source/drain regions of the NVM cells omit lightly-doped drains (which are used in the CMOS FETs), and the NVM cells are formed with thinner sidewall oxide layers than the CMOS FETs to facilitate programming/erasing operations. A production method includes a modified CMOS process flow where the CMOS FET gate structures receive different source/drain diffusions and oxides than the NVM gate structures, but both receive substantially identical sidewall spacers, which are used as charge storage structures in the NVM cells.

REFERENCES:
patent: 4818714 (1989-04-01), Haskell
patent: 4855247 (1989-08-01), Ma et al.
patent: 5267194 (1993-11-01), Jang
patent: 5347161 (1994-09-01), Wu et al.
patent: 5602788 (1997-02-01), Barry et al.
patent: 5760435 (1998-06-01), Pan
patent: 5768192 (1998-06-01), Eitan
patent: 6008077 (1999-12-01), Maeda
patent: 6025267 (2000-02-01), Pey et al.
patent: 6180472 (2001-01-01), Akamatsu et al.
patent: 6249015 (2001-06-01), Matsuo et al.
patent: 6277683 (2001-08-01), Pradeep et al.
patent: 6348387 (2002-02-01), Yu
patent: 6762085 (2004-07-01), Zheng et al.
patent: 6765259 (2004-07-01), Kim
patent: 6803620 (2004-10-01), Moriya et al.
patent: 6825073 (2004-11-01), Wu
patent: 6885072 (2005-04-01), Jeng
patent: 2002/0142523 (2002-10-01), Ryu et al.
patent: 2003/0222303 (2003-12-01), Fukuda et al.
patent: 2004/0041199 (2004-03-01), Kim
patent: 2004/0232477 (2004-11-01), Iwata et al.
patent: 2005/0037577 (2005-02-01), Kim et al.
Fukuda, Masatoshi et al., New Nonvolatile Memory With Charge-Trapping Sidewall, IEEE Electron Device Letters, vol. 24, No. 8, Jul. 2003, pp. 490-492.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Embedded non-volatile memory cell with charge-trapping... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Embedded non-volatile memory cell with charge-trapping..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Embedded non-volatile memory cell with charge-trapping... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3812794

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.