Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
2005-12-08
2009-08-11
Malsawma, Lex (Department: 2892)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C257S700000, C257S773000, C257SE23067, C438S127000
Reexamination Certificate
active
07572681
ABSTRACT:
A method of forming an embedded electronic component package includes coupling a substrate to a first dielectric layer, strip, or panel, and forming first electrically conductive vias and traces in the first dielectric layer. A cavity is then formed in the first dielectric layer and an electronic component is attached in the cavity. A second dielectric layer, strip, or panel, is then applied to the first dielectric layer, thereby encasing the electronic component in dielectric. Second via apertures are then formed through the second dielectric layer to expose selected electronic component bond pads and/or selected first electrically conductive vias and traces. The second via apertures are then filled with an electrically conductive material to form second electrically conductive vias electrically coupled to selected bond pads and selected first electrically conductive vias and traces.
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Hiner David J.
Huemoeller Ronald Patrick
Rusli Sukianto
Amkor Technology Inc.
Gunnison McKay & Hodgson, L.L.P.
Hodgson Serge J.
Kraig William F
Malsawma Lex
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