Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2000-11-16
2002-04-02
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S231000, C438S232000, C438S301000, C438S303000, C438S305000, C438S585000, 43, 43, 43, 43
Reexamination Certificate
active
06365496
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor integrated circuit devices and in particular to formation of conductive contacts in semiconductor integrated circuit devices. Still more particularly, the present invention relates to formation of barrier layers employed between metal contacts and a silicon substrate.
2. Description of the Prior Art
Despite recent efforts to exploit metals such as copper or silver for microelectronic interconnects and contacts, aluminum (including aluminum alloy such as AlCu) contact technologies, which utilize only a titanium or titanium nitride barrier layer and an aluminum alloy metal contact or via, continue to be utilized for many different semiconductor device applications. Aluminum contact technologies are reliable, save costs, and eliminate the need for tungsten deposition and tungsten etch back or chemical mechanical polishing (CMP) processes normally associated with tungsten plug technology. Along with these advantages, however, there are disadvantages in using such aluminum contact technologies at the substrate contact metallization level.
The main disadvantage of using aluminum contact technologies at the substrate contact level is aluminum junction spiking, a result of aluminum spiking into the silicon substrate and silicon diffusion from the substrate into the contact plug. Such spiking may degrade the electrical characteristics of the contact, resulting, in turn, in improper operation of the circuit which includes the contact. Although sufficiently thick barrier layers may reduce the occurrence of such spiking, small geometry devices may not permit formation of layers of such thickness between the metal and the substrate.
It would be desirable, therefore, to provide a process for substantially reducing junction spiking for metal contacts utilized at the substrate contact level.
SUMMARY OF THE INVENTION
A contact opening to a silicon substrate within which a metal contact is to be formed is cleaned by soft sputter etch to clean the substrate surface and remove any residue which would interfere with formation of a continuous silicide layer across the contact region. Contact profile protrusion at the interface between two dielectrics forming the insulating material through which the contact opening is formed is also reduced by the soft sputter etch. A barrier is formed over the contact region utilizing two discrete deposition steps, preferably separated by an interval of time and employing different process parameters, to provide a shift in the grain boundaries between the two barrier layers, creating diffusion traps at grain discontinuities inhibiting the diffusion of metal through the barrier layer. Performance of the barrier layer in preventing junction spiking is thereby increased.
REFERENCES:
patent: 4782380 (1988-11-01), Shankar et al.
patent: 4784973 (1988-11-01), Stevens et al.
patent: 5395798 (1995-03-01), Havemann
patent: 5670427 (1997-09-01), Cho
patent: 6153456 (2000-11-01), Lin et al.
Elms Richard
Jorgenson Lisa K.
Luu Pho
STMicroelectronics Inc.
Venglarik Daniel E.
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