Elevated substrate formation and local interconnect integrated f

Details Elevated substrate formation and local interconnect integrated f Elevated substrate formation and local interconnect integrated f

1997-12-19

2000-02-29

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438152, 438268, H01L 2100, H01L 218236

Patent

active

060308605

ABSTRACT:
A wafer includes levels elevated above the wafer substrate or base substrate which includes separated substrates suitable for circuit device element formation. In one embodiment, a first level dielectric is formed over circuit devices having elements formed in the wafer substrate. Contacts from the circuit elements may extend to the surface of the first level dielectric. A second dielectric is formed on the first level dielectric and etched to create separated openings with some openings exposing contacts. The openings are filled with substrate material, thus forming elevated substrates and local interconnects where exposed contact top surfaces are present. The substrate material is suitable for circuit device fabrication. Additional levels of elevated substrates and concurrently formed local interconnects may be subsequently fabricated.

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